High frequency, cold cathode, triode-type, field-emitter vacuum tube and process for manufacturing the same

ABSTRACT

Disclosed herein is a high frequency, cold cathode, triode-type, field-emitter vacuum tube including a cathode structure, an anode structure spaced from the cathode structure, and a control grid, wherein the cathode structure and the anode structure are formed separately and bonded together with the interposition of spacers, and the control grid is integrated in the anode structure.

CROSS-REFERENCE TO RELATED PATENT APPLICATIONS

The present application is a U.S. national stage application under 35U.S.C. §371 of PCT Application No. PCT/IT2006/000883, filed Dec. 29,2006, the entirety of which is incorporated herein by reference.

TECHNICAL FIELD

The present invention relates in general to a micro/nanometrical devicebelonging to the family of semiconductor vacuum tubes for high frequencyapplications, and more particularly to a high frequency, cold cathode,triode-type, field-emitter vacuum tube and to a process formanufacturing the same.

BACKGROUND ART

As is known, in the last thirty years, and in particular after thepublication by Charles Spindt of his first article on the manufacture ofcold cathode vacuum tubes (C. A. Spindt et al., Physical properties ofthin-film field emission cathodes with molybdenum cones, Journal ofApplied Physics, vol. 47, December 1976, pages 5248-5263), there hasbeen a renewed interest in the manufacture of high frequency, wide band,radiation insensitive vacuum tubes. This renewed interest is justifiedby the fact that this type of electronic devices, which, for generatingan electron beam, exploit the field emission phenomenon instead of thethermionic phenomenon exploited by the conventional, old generationvacuum tubes, lend themselves to an ever increasing miniaturization.

In fact, the conventional vacuum tubes suffered from limitations due tothe use of a thermionic cathode for electron emission, which cathode, inorder to emit electrons, had to reach high operating temperatures ofabout 800 to 1200° C., with consequent problems linked to the managementof the electrical power necessary to operate the vacuum tube (in a tubeoperating at low electrical power, namely less than 10 W, the electricalpower necessary to heat up the cathode may be higher than the operatingone) and of the so-called heating-up time (thermionic effect initiationtime), and also linked to the stabilization of the control grid, which,in high frequency applications, was too close to the cathode (<25 μm)(see for example C. Bower, W. Zhu, D. Shalom, D. Lopez, G. P. Kochanski,P. L. Gammel, S. Jin, A micromachined vacuum triode using a carbonnanotube cold cathode, IEEE transactions on Electron Devices, Vol. 49,August 2002, pages 1478-1483).

On the contrary, the vacuum tube with a field emission array (FEA)cathode proposed by Spindt, generally known as Spindt Cathode, allowedthe advantages provided by the vacuum electronics to be enjoyed, namelythe property of the electrons of reaching higher speeds in the vacuumthan in a semiconductor material. All these advantages are achieved witha substantially zero heating-up time, and with the possibility ofarranging the control grid close to the cathode without havinginstability problems due to the heat of the electrodes, thus allowinghigher operating frequencies to be reached (nominally from GHz to THz)and lower electrical power to initiate the electron generation processthan necessary in thermionic tubes.

In particular, Spindt cathodes consist of microfabricated metal fieldemitter cones or tips formed on a conductive substrate. Each emitter hasits own concentric aperture in an accelerating field generated by a gateelectrode, also known as control grid, which is isolated from thesubstrate and the emitters by a silicon dioxide layer. With individualtips capable of producing several tens of microamperes, large arrays cantheoretically produce large emission current densities.

Performance of Spindt cathodes are heavily limited by the destruction ofthe emitting tips due to their material wear, and for this reason manyefforts have been spent worldwide in searching innovative materials forthe production of the emitting tips.

In particular, the Spindt structure was improved by considering carbonnanotubes (CNTs) as cold cathode emitters (see for example S. Iijima,Helical microtubules of graphitic carbon, Nature, 1991, volume 354,pages 56-58, or W. Heer, A. Chatelain, D. Ugarte, A carbon nanotubefield-emission electron source, Science, 1995, volume 270, number 5239,pages 1179-1180). Carbon nanotubes are perfectly graphitized,cylindrical tubes that can be produced with diameters ranging from about2 to 100 nm, and lengths of several microns using different productionprocesses. CNTs may be rated among the best emitters in nature (see forexample J. M. Bonard, J.-P. Salvetat, T. Stöckli, L. Forrò, A.Châtelain, Field emission from carbon nanotubes: perspectives forapplications and clues to the emission mechanism, Applied Physics A,1999, volume 69, pages 245-254) and are ideal field emitters in aSpindt-type device, so many efforts have been spent worldwide instudying their field emission properties.

FIG. 1 shows a schematic view of a known Spindt-type cold cathode triode1 including a cathode structure 2; an anode electrode 3 spaced from thecathode structure 2 by means of lateral spacers 4; and a control grid 5integrated in the cathode structure 2. The cathode structure 2 with theintegrated control grid 5 and the anode electrode 3 are formedseparately and then bonded together with the interposition of thelateral spacers 4. The anode electrode 3 is made up of a firstconductive substrate functioning as an anode, while the cathodestructure 2 is a multilayer structure including a second conductivesubstrate 7; an insulating layer 8 arranged between the secondconductive substrate 7 and the grid 5; a recess 9 formed to penetratethe grid 5 and the insulating layer 8 so as to expose a surface of thesecond conductive substrate 7; and Spindt-type emitting tips 10 formedin the recess 9 in ohmic contact with the second conductive substrate 7and functioning as a cathode.

DISCLOSURE OF THE INVENTION

The Applicant has noticed that the topographic configuration of knownSpindt-type vacuum tubes, in which the control grid is formed over thecathode, suffers from different problems, and in particular:

-   -   manufacture of emitting tips integrated with the control grid        typically requires a complex technological process because it is        necessary to place the emitting cathode within a multilayer        structure (conductive substrate—insulating oxide—grid metal),        and this process typically requires a high number of        technological steps, the complexity of which is due to the        difficulty of integrating different technologies. For emitting        cathodes made up of carbon nanotubes it is for example necessary        to study the technological steps relating to the manufacture of        the substrate, and hence typically the materials used for the        manufacture and the topography of the structures, so as to allow        the subsequent growth of the carbon nanotubes by using the        typical techniques used for this purpose (HF-CVD, PE-CVD, laser        ablation);    -   in devices with emitting tips that come out from an opening in        the insulating layer, for example when carbon nanotubes are used        as emitting tips, proximity of the control grid to the cathode        may cause a short circuit between the control grid and the        emitting tips, with consequent malfunctioning of the device;    -   the metal grid absorbs a non-neglectable part of the electrons        emitted by the cathode (˜10%, see for example Y. M. Wong, W. P.        Kang, J. L. Davidson, B. K. Choi, W. Hofmeister, J. H. Huang,        Field emission triode amplifier utilizing aligned carbon        nanotubes, Diamond and related materials 2005, volume 14, issue        11-12, pages 2069-2073), so making the device performance worse;        and    -   the operating frequency of this type of device is heavily        limited by the parasitic capacitance between the grid and the        cathode. In fact, assuming that the grid and the cathode may be        modeled as two flat and parallel planes, the parasitic        capacitance is C=ε₀ε_(r)(A/d), where ε_(o) is the vacuum        permittivity, ε_(r) is the relative permittivity of the        insulating material between the cathode and the grid, A is the        area of the grid, and d is the distance between the cathode and        the grid. From the foregoing, it is evident that the operating        frequency of this type of device is heavily dependent on the        topographic characteristics of the device itself.

The main objective of present invention is therefore to provide aninnovative topographical configuration of cold cathode vacuum tubes andan innovative manufacturing method which allow the aforementioneddrawbacks to be at least overcome.

This objective is achieved by the present invention in that it relatesto a high frequency, cold cathode, triode-type, field-emitter vacuumtube and to a process for manufacturing the same, as defined in theappended claims.

The present invention achieves the aforementioned objective by varyingthe typical topography of the vacuum tube, and in particularly byforming the control grid over the anode, instead of over the cathode asin the known Spindt-type vacuum tubes, and then assembling the anode andthe control grid formed thereover with the cathode, which is alwaysmanufactured separately from the anode (and the grid), with theinterposition of spacers. Conveniently, during the formation of the gridover the anode, an additional insulating layer is formed between theanode and the grid to reduce leakage currents.

BRIEF DESCRIPTION OF THE DRAWINGS

For a better understanding of the present invention, preferredembodiments, which are intended purely by way of example and are not tobe construed as limiting, will now be described with reference to theattached drawings (all not to scale), wherein:

FIG. 1 shows a schematic view of a known Spindt-type cold cathodetriode;

FIG. 2 shows a schematic view of a high frequency cold cathodetriode-type field-emitter vacuum tube in accordance with an embodimentof the present invention;

FIGS. 3 a-3 l are lateral sectional views of a semiconductor waferduring successive steps of the manufacture of a cathode structure of theSpindt-type cold cathode field-emitter triode of FIG. 2, in accordancewith an embodiment of the present invention;

FIGS. 4 a-4 m are lateral sectional views of a semiconductor waferduring successive steps of the manufacture of an anode structure of theSpindt-type cold cathode field-emitter triode of FIG. 2, in accordancewith an embodiment of the present invention;

FIGS. 5 a-5 q are sectional views of a semiconductor wafer duringsuccessive steps of the manufacture of an anode structure, provided witha getter material, of a Spindt-type cold cathode field-emitter triode inaccordance with an embodiment of the present invention;

FIG. 6 is a top view of an anode structure, provided with a gettermaterial, of a Spindt-type cold cathode field-emitter triode inaccordance with an embodiment of the present invention; and

FIG. 7 shows a schematic view of a Spindt-type cold cathode triode-typefield-emitter vacuum tube provided with a getter material, in accordancewith an embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

The following discussion is presented to enable a person skilled in theart to make and use the invention. Various modifications to theembodiments will be readily apparent to those skilled in the art, andthe generic principles herein may be applied to other embodiments andapplications without departing from the spirit and scope of the presentinvention. Thus, the present invention is not intended to be limited tothe embodiments shown, but is to be accorded the widest scope consistentwith the principles and features disclosed herein and defined in theattached claims.

FIG. 2 shows a schematic view of a high frequency cold cathodetriode-type field-emitter vacuum tube in accordance with an embodimentof the present invention.

The cold cathode triode-type field-emitter vacuum tube, designated by11, includes a cathode structure 12; an anode structure 13 spaced fromthe cathode structure 12 by means of lateral spacers 14; and a controlgrid 15 integrated in the anode structure 13. The cathode structure 12and the anode structure 13 with the integrated grid 15 are formedseparately and then bonded together with the interposition of thelateral spacers 14.

In particular, the cathode structure 12 is a multilayer structureincluding a first conductive substrate 16; a first insulating layer 17formed on the first conductive substrate 16; a recess 18 formed topenetrate the first insulating layer 17 so as to expose a surface of thefirst conductive substrate 16; and emitting tips 19, in the form ofcarbon nanotubes, nanowires or Spindt-type tips, formed in the recess 18in ohmic contact with the first conductive substrate 16, and functioningas a cathode.

The anode structure 13 is a multilayer structure including a secondconductive substrate 20 functioning as an anode; a second insulatinglayer 21 formed between the second conductive substrate 20 and the grid15; a double recess structure including a wide recess 23 formed topenetrate the grid 15 so as to expose a surface of the second insulatinglayer 21, and a narrow recess 24 formed in the wide recess 23 topenetrate the second insulating layer 21 so as to expose a surface ofthe second conductive substrate 20; and a third insulating layer 22formed between the grid 15 and the lateral spacers 14 and covering alsothe side walls of the grid 15.

Recesses 18, 23 and 24 are vertically aligned in such a manner that theemitting tips 19 face the exposed surface of the second conductivesubstrate 20, and the lateral spacers 14 are arranged outside therecesses 18, 23 and 24 so that the recesses 18, 23 and 24 and theemitting tips 19 are arranged between the lateral spacers 14.

FIGS. 3 a-3 l are sectional views of a semiconductor wafer duringsuccessive steps of the manufacture of the cathode structure 12 of FIG.2, in accordance with an embodiments of the present invention, wheresame reference numerals designate same elements. Additionally, for thesake of simplicity, the following description will refer to themanufacture of two adjacent cathode structures 12, the manufacture of anarray of cathode structures 12 simply requiring the use oflithographical masks in which the same structure is repeated.

With reference to FIGS. 3 a-3 l, a 1-5 μm-thick insulating layer 17 madefor example of silicon dioxide (SiO₂), is formed, in the exampleconsidered by oxidation, on a 300-μm thick conductive substrate 16 madefor example of monocrystalline silicon (Si) (FIG. 3 a). Then a maskinglayer 30, made for example of photoresist, is formed, for example bydeposition, on the insulating layer 17 (FIG. 3 b), then patterned, inthe example considered by a masked UV exposure, designated by 31 (FIG. 3c), and subsequently developed, so forming a mask 32 with apertureswhich expose selective portions of the insulating layer 17 (FIG. 3 d).The apertures are advantageously in the form of strips extending in aperpendicular direction to the sheet, are spaced from one another byapproximately 5-20 μm, and have a width of 1-5 μm.

Using the mask 32, exposed portions of the insulating layer 17 are wetor dry etched, so forming trenches 33 in the insulating layer 17, whichtrenches 33 are laterally delimited by insulating columns 34, extend indepth as far as the conductive substrate 16, and have a shape, a widthand a spacing corresponding to that of the apertures of the mask 32(FIG. 3 e). Additionally, each trench 33 defines a respective recess 18in the insulating layer 17 (FIG. 2), where the emitting tips 19 willthen be formed.

Then, in a first embodiment shown in FIGS. 3 f, 3 g and 3 h, the mask 32is removed (FIG. 3 f) and vertically aligned carbon nanotubes emittingtips 19 (FIG. 3 h) are synthesized in the trenches 33 by depositing a 20nm-thick catalyst layer 35 (for example Fe or Ni) on the wafer bycasting (the solution that may for example be used is Fe(NO₃)₃.9H₂O inacetone) (FIG. 3 g).

In a second, alternative embodiment shown in FIGS. 3 i and 3 l, the mask32 is not removed and used as a mask for the 20 nm-thick catalyst layer35, which is deposited on the wafer by sputtering (FIG. 3 i), and thenremoved, by using a lift-off technique, from the insulating columns 34and the lateral walls of the trenches 33 (FIG. 3 l).

In a third, alternative embodiment (not shown), a further lithographicstep may be provided to pattern the catalyst layer 35 in the trenches33.

If the carbon nanotubes emitting tips 19 are grown as previouslydescribed with reference to FIGS. 3 f and 3 g, namely from a catalyst insolution deposited by casting, the selectivity is guaranteed by thereduction of the Fe(NO₃)₃ in the reaction chamber, which reduction takesplace only in the areas of the conductive substrate 16 exposed via thelithographic process, while if the carbon nanotubes emitting tips 19 aregrown as previously described with reference to FIGS. 3 i and 3 l,namely via a catalyst deposited by sputtering, the selectivity isguaranteed by the lithographic process which defines areas on which thecatalyst is present, which catalyst, during the synthesis, has to beclustered.

FIGS. 4 a-4 m are sectional views of a semiconductor wafer duringsuccessive steps of the manufacture of the anode structure 13 of FIG. 2,in accordance with an embodiment of the present invention, where samereference numerals designate same elements. Additionally, for the sakeof simplicity, the following description will refer to the manufactureof two adjacent anode structures 13, the manufacture of an array ofanode structures 13 simply requiring the use of lithographical masks inwhich the same structure in repeated.

With reference to FIGS. 4 a-4 m, an insulating layer 21, made forexample of silicon dioxide (SiO₂) and having a thickness from somemicrons to some tens of microns, is formed, in the example considered byoxidation, on a 300-μm thick conductive substrate 20 made for example ofmonocrystalline silicon (Si) (FIG. 4 a). Then a first masking layer 36,for example made of photoresist, is formed, for example by deposition,on the insulating layer 21 (FIG. 4 b), then patterned, in the exampleconsidered by a masked UV exposure, designated by 37 (FIG. 4 c), andsubsequently developed, so as to form a first mask 38 with apertureswhich expose selective portions of the insulating layer 21 (FIG. 4 d).The apertures are advantageously in the form of strips extending in aperpendicular direction to the sheet, are spaced from one another byapproximately 5-50 μm, and have a width of 1-5 μm.

Using the first mask 38, exposed portions of the insulating layer 21 aredry or wet etched, so forming trenches 39 in the insulating layer 21,which trenches are laterally delimited by insulating columns 40, extendin depth as far as the conductive substrate 20, and have a shape, awidth and a spacing corresponding to that of the apertures of the firstmask 38 (FIG. 4 e).

Then, the first mask 38 is removed (FIG. 4 f) and a second masking layer41, for example made of photoresist, is formed, in the exampleconsidered by deposition, which completely fills the trenches 39 andcovers the insulating columns 40 (FIG. 4 g). The second masking layer 41is then patterned, in the example considered by a masked UV exposure,designated by 42 (FIG. 4 h), so as to expose only the portions of thesecond masking layer 41 on the insulating columns 40, while leavingcovered the portions of the second masking layer 41 on the trenches 39(FIG. 4 h), and subsequently developed, so as to form a third mask 43which completely covers bottom and lateral walls of the trenches 39 andalso partly extends on the insulating columns 40 for about 1-50 μm (FIG.4 i).

A 50-500 nm-thick metal grid layer 44 is then formed, for example bydeposition, on the wafer, so as to completely fill the trenches 39 andcover the insulating columns 40 (FIG. 4 l), and then removed, using alift-off process, all over the entire surface of the wafer, except onthe areas of the insulating columns 40 exposed by the third mask 43,thus forming the grid 15. Finally, a grid insulating layer 22, havingthe purpose of covering the grid 15 to prevent a shortcircuit of thegrid with the emitting tips 19, is formed, in the example considered byoxidation, on the grid 15 by anodizing, thus obtaining the structureshown in FIG. 4 m, where the internal vertical sides of the grid remainspaced out from the internal vertical sides of the insulating columns 40of 1-20 μm, thus significantly limiting the leakage currents because theemitted electrons are not collected by the grid 15 which is covered bythe oxide. As a general rule, as the dimension of the grid 15 depends onthe grid-to-trench and grid-to-grid distances, the grid 15 has to bedimensioned consistently with the structure alignment process, which mayvary depending on the applications which the cold cathode triode-typefield-emitter vacuum tube 11 is designed for.

The cathode structure 12 and the anode structure 13 with integrated grid15 formed as described above with references to FIGS. 3 and 4 arealigned and bonded together via the interposition of the lateral spacers14, and creating the vacuum therebetween (vacuum bonding). The functionof the lateral spacers 14 is that of allowing an electrical insulationbetween the cathode structure 12 and the anode structure 13 to becreated and an effective vacuum bonding to be made. In particular,standard wafer-to-wafer vacuum bonding techniques may be used to jointhe cathode structure 12 and the anode structure 13, including anodicbonding, glass frit bonding, eutectic bonding, solder bonding, reactivebonding and fusion bonding.

One of the main problems of this type of packing techniques is linked tothe pressure that is reached in the cavity between the cathode structure12 and the anode structure 13. For example, in the anodic bonding thepressure in the cavity reaches values 100-400 Torr due to oxygengeneration, while in the solder bonding the pressure in the cavityreaches values of 2 Torr due to gas desorption, which pressure may bereduced to 1 Torr if the wafers are heated up before assembly.Therefore, what happens is that while it is possible to obtain pressuresbelow μTorr by using vacuum wafer bonding techniques, materialdesorption that happens as a result of the bonding (or assembly), thefinal pressure is always relatively high.

Since a high quality of vacuum is necessary for a good operation of thefield-emitter vacuum tube 11, according to another aspect of the presentinvention, formation of a region containing a particularly reactivematerial such as Ba, Al, Ti, Zr, V, Fe, commonly known as getter,allows, when appropriately activated, molecules desorbed during thebonding to be captured. For a detailed description of getter materialreference may be made to Douglas R. Sparks, S. Massoud-Ansari, and NaderNajafi, Chip-Level Vacuum Packaging of Micromachines Using NanoGetters,IEEE transactions on advanced packaging, volume 26, number 3, August2003, pages 277-282, and Yufeng Jin, Zhenfeng Wang, Lei Zhao, Peck ChengLim, Jun Wei and Chee Khuen Wong, Zr/V/Fe thick film for vacuumpackaging of MEMS, Journal of Micromechanics and Microengineering,volume 14, 2004, pages 687-692.

Introduction of the getter material in the field-emitter vacuum tube,hereinafter designated by 11′, may be made by an additional step in theprocess of manufacture of the anode structure 13, as shown in FIGS. 5 ato 5 q, where FIGS. 5 a to 5 g are the same as FIGS. 4 a to 4 g andhence will not be described again.

With reference to FIGS. 5 a to 5 q, once the first mask 38 has beenremoved (FIG. 5 f) and the second masking layer 41 has been formed (FIG.5 g), the second masking layer 41 is patterned, in the exampleconsidered by a masked UV exposure, designated by 45, so as to exposeonly a portion of the second masking layer 41 on one trench 39, whileleaving covered the remaining portions of the second masking layer 41 onthe insulating columns 40 and the other trench 39 (FIG. 5 h), andsubsequently developed, so as to form a third mask 46 which completelycovers the insulating columns 40 and the bottom and lateral walls of thetrench 39 that was not exposed during the masked UV exposure, whileleaving exposed only the bottom and lateral walls of the trench 39 thatwas exposed during the masked UV exposure (FIG. 5 i).

Then, a metal getter layer 47 having a thickness in the range of micronsis formed, for example by deposition, on the wafer (FIG. 5 l), and thenremoved, using a lift-off process, all over the entire surface of thewafer, except on the trench 39 that was not covered by the third mask 46(FIG. 5 m). A third masking layer 48, for example made of photoresist,is then formed, in the example considered by deposition, on the wafer soas to completely fill the trenches 39 and cover the insulating columns40, and then patterned, in the example considered by a masked UVexposure, designated by 49, so as to expose only portions of the thirdmasking layer 48 on the insulating columns 40, while leaving coveredportions of the third masking layer 48 on the trenches 39, and inparticular on the getter layer 47 (FIG. 5 n). The third masking layer 48is then developed so as to form a fourth mask 50 which completely coversthe trench 39 that contains the getter 47 and also partly extends on theadjacent insulating columns 40 for about 1-50 μm, as well as completelycovers the bottom and lateral walls of the other trench 39 that does notcontain the getter 47 and also partly extends on the adjacent insulatingcolumns 39 for about 1-50 mm (FIG. 5 o).

A 50-500 nm-thick metal grid layer 44 is then formed, for example bydeposition, on the wafer (FIG. 5 p), and then removed, using a lift-offprocess, all over the entire surface of the wafer, except on the area ofthe insulating columns 39 exposed by the fourth mask 50, thus formingthe grid 15. Finally, a grid insulating layer 22, having the purpose ofcovering the grid to prevent a shortcircuit of the grid with theemitting tips 19, is formed, in the example considered by oxidation, onthe grid 15 by anodizing, thus obtaining the structure shown in FIG. 5q, where the internal vertical sides of the grid remain spaced out fromthe internal vertical sides of the insulating columns 39 of 1-50 μm,thus significantly limiting the leakage currents. Preferably, the grid15 and the getter 47 have, in top view, a ring pattern of the type showin FIG. 6, where the grid 15 is not visible because completely coveredby the grid insulating layer 22.

Finally, the anode structure 13 with integrated grid 15 and getter 47 isbonded to the cathode structure 12, so forming the cold cathodetriode-type field-emitter vacuum tube 11′ shown in FIG. 7, wherein theleft part is identical to that shown in FIG. 2, and the right part isstructurally similar to the left part, namely it includes a doublerecess structure including a wide recess 51 formed to penetrate the grid15 so as to expose a surface of the second insulating layer 21, and anarrow recess 52 formed in the wide recess 51 to penetrate the secondinsulating layer 21 so as to expose a surface of the second conductivesubstrate 20, wherein the wide and narrow recesses 51, 52 are separatedfrom the wide and narrow recesses 23, 24 by a lateral spacer 14, andwherein the getter 47 is formed in the narrow recess 52.

The advantages of the field-emitter vacuum tube according to the presentinvention are evident from the foregoing. In particular:

-   -   the integration of the grid 15 in the anode structure 13 instead        of in the cathode structure 12 prevents any shortcircuit between        the grid 15 and the emitting tips 19, and allows a simpler and        highly reproducible manufacturing process to be obtained;    -   the additional insulating layer 22 between the grid 15 and the        lateral spacers 14 and the fact that the internal vertical sides        of the grid 15 are spaced out from the internal vertical sides        of the insulating layer 21 significantly reduce the leakage        currents; and    -   the thickness of the conductive substrate 20 and of the        insulating layer 21 in the anode structure 13 allows a lower        parasitic capacitance between the anode 20 and the grid 15 to be        obtained and consequently a higher operating frequency to be        reached.

Finally, numerous modifications and variants can be made to thefield-emitter vacuum tube according to the present invention, allfalling within the scope of the invention, as defined in the appendedclaims.

In particular, it may be appreciated by the skilled person that thethickness of the various layers of the field-emitter vacuum tubeaccording to the present invention and the various steps of therespective manufacturing process are only indicative and may be variedaccording to specific necessity.

1. A cold cathode triode-type field-emitter vacuum tube comprising: acathode structure; an anode structure spaced from the cathode structure;and a control grid; wherein the cathode structure and the anodestructure are formed separately and bonded together with theinterposition of spacers; wherein the control grid is integrated in theanode structure; and wherein the anode structure includes a secondconductive substrate, a second insulating layer formed between thesecond conductive substrate and the control grid, a third insulatinglayer formed between the control grid and the spacers, and a firstrecess structure formed to penetrate the third insulating layer, thecontrol grid, and the second insulating layer so as to expose a surfaceof the second conductive substrate.
 2. The field-emitter vacuum tube ofclaim 1, wherein the cathode structure includes a first conductivesubstrate, a first insulating layer formed on the first conductivesubstrate, a first recess formed to penetrate the first insulating layerso as to expose a surface of the first conductive substrate, andemitting tips formed in the first recess and in ohmic contact with thefirst conductive substrate.
 3. The field-emitter vacuum tube of claim 1,wherein the first recess structure includes a first wide recess formedto penetrate the third insulating layer and the control grid so as toexpose a surface of the second insulating layer, and a first narrowrecess formed in the first wide recess to penetrate the secondinsulating layer so as to expose a surface of the second conductivesubstrate.
 4. The field-emitter vacuum tube of claim 2, wherein thefirst recess structure and the first recess are vertically aligned insuch a manner that the emitting tips face the exposed surface of thesecond conductive substrate, and the spacers are arranged outside thefirst recess structure and the first recess so that the first recessstructure, the first recess and the emitting tips are arranged betweenthe spacers.
 5. The field-emitter vacuum tube of claim 1, furthercomprising a second recess structure formed to penetrate the thirdinsulating layer, the control grid, and the second insulating layer soas to expose a surface of the second conductive substrate; and a gettermaterial formed in the second recess structure.
 6. The field-emittervacuum tube of claim 5, wherein the second recess structure includes asecond wide recess formed to penetrate the third insulating layer andthe control grid so as to expose a surface of the second insulatinglayer, and a second narrow recess formed in the second wide recess topenetrate the second insulating layer so as to expose a surface of thesecond conductive substrate; and wherein the getter material is arrangedin the second narrow recess.
 7. The field-emitter vacuum tube of claim5, wherein the first recess structure is separated from the secondrecess structure by a spacer.
 8. A method for manufacturing a coldcathode triode-type field-emitter vacuum tube, comprising: formingseparately a cathode structure and an anode structure; forming a controlgrid; bonding together the cathode structure and the anode structurewith the interposition of spacers; wherein the control grid is formedintegrated in the anode structure; and wherein the step of forming theanode structure includes: forming a second conductive substrate; forminga second insulating layer between the second conductive substrate andthe control grid; forming a third insulating layer between the controlgrid and the spacers; and forming a first recess structure to penetratethe third insulating layer, the control grid, and the second insulatinglayer so as to expose a surface of the second conductive substrate. 9.The method of claim 8, wherein the step of forming the cathode structureincludes: forming a first conductive substrate; forming a firstinsulating layer on the first conductive substrate; forming a firstrecess to penetrate the first insulating layer so as to expose a surfaceof the first conductive substrate; and forming emitting tips in thefirst recess and in ohmic contact with the first conductive substrate.10. The method of claim 8, wherein the step of forming the first recessstructure comprises: forming a first wide recess to penetrate the thirdinsulating layer and the control grid so as to expose a surface of thesecond insulating layer; and forming a first narrow recess in the firstwide recess to penetrate the second insulating layer so as to expose asurface of the second conductive substrate.
 11. The method of claim 9,wherein the first recess structure and the first recess are vertically,aligned in such a manner that the emitting tips face the exposed surfaceof the second conductive substrate, and the spacers are arranged outsidethe first recess structure and the first recess so that the first recessstructure, the first recess and the emitting tips are arranged betweenthe spacers.
 12. The method of claim 8, further comprising: forming asecond recess structure to penetrate the third insulating layer, thecontrol grid, and the second insulating layer so as to expose a surfaceof the second conductive substrate; and forming a getter material in thesecond recess structure.
 13. The method of claim 12, wherein the step offorming the second recess structure comprises: forming a second widerecess to penetrate the third insulating layer and the control grid soas to expose a surface of the second insulating layer; and forming asecond narrow recess in the second wide recess to penetrate the secondinsulating layer so as to expose a surface of the second conductivesubstrate; and wherein the getter material is formed in the secondnarrow recess.
 14. The method of claim 13, wherein the first recessstructure is separated from the second recess structure by a spacer.